---------------- v4.0.4 -------------------------------------------

Fixed an bug where the SDCTRL registers on the GR740 were initialized when "-ni" startup option is used. The issue were introduced in 4.0.0.

Enable NMIE during startup for RISC-V systems and added an startup option to avoid it.

Improved support for RISC-V in GDB service.

Stop timers in debug mode even if "-ni" startup is set on RISC-V, to avoid watchdog triggers and similar.

Fixed a bug that could deadlock GRMON while shutting down when connected to a LEON5 system that has been detached.

Allow multiple "-udrv" and "-ucmd" startup options.

Added support to enter debug mode instead of critical error mode for RISC-V.

Added support for several missing RISV CSR registers, and removed deprecated, based on the latest ratified specifications.

Rename RISC-V virtual register "prv" to "priv".

Fixed a bug related to AHB trace filtering for LEON5.

Added support for the Micron MT25QU01GBBB SPI memory.

Added support for Avalanche SPI memories.

Improved PNP scanning for multi-bus systems.

Various GR765 improvements to output from commands.

Added support to disassemble custom SWAR instructions.

Fixed a bug related to loading a DTB.

---------------- v4.0.3 -------------------------------------------

Support for RISC-V MCONTROL6 triggers

Fixed a bug where ASCII printout of mem commands was swapped on little endian systems.

Commands "inst", "ahb" and "at" now prints all entries by default

Reduce the number of pop-ups in the GUI when an error occur.

Commands "info sys" and "info reg"  will print if devices are clock gated.

Add -vs option to command vmem

Added "target_little_endian" and "target_big_endian" TCL variables with a boolean value.

Fixed a bug where DTS files wasn't compiled and loaded properly.

Support DTB overlays

Improved automatic DTB generation

Fixed a bug where enabled cores in the clockgating unit could be reset

Fixed a crash related to hypervisor MMU tables

Support 64-bit addresses when printing breakpoints

Support 8 ways in the L2CACHE

Support multiple chip-selects on SPIMCTRL

---------------- v4.0.2 -------------------------------------------

Fixed a crash related to threads

---------------- v4.0.1 -------------------------------------------
First release
